Nanotechnology has been identified as a key technology for the 21st century. This technology is centred on an ability to fabricate electronic, optical and opto-electronic devices on the scale of a few billionths of a metre. In the future, such devices will underpin new computing and communications technologies and will be incorporated in a vast array of consumer goods.
There are many advantages of fabricating nanoscale devices. In the simplest case, such devices are much smaller than the current commercial devices (such as the transistors used in integrated circuits) and so provide opportunities for increased packing densities, lower power consumption and higher speeds. In addition, such small devices can have fundamentally different properties to those fabricated on a larger scale, and this then provides an opportunity for completely new device applications.
One of the challenges in this field is to develop nanostructured devices that will take advantage of the laws of quantum physics. Electrical devices with dimensions of ˜100 nm that operate on quantum principles (such as single electron transistors and quantum wires) have generally been proven at only low temperatures (<−100° C.). The challenge now is to translate these same device concepts into structures with dimensions of only a few nanometres, since the full range of quantum effects and novel device functionalities could then be available at room temperature. Indeed, as discussed below, some prototype nanoscale devices have been fabricated that demonstrate such quantum effects at relatively high temperatures. However, as is also discussed below, there remain many challenges to overcome before such devices find commercial applications.
In general, there are two distinct approaches to fabricating nanoscale devices:                ‘top-down’, and        ‘bottom up’.        
In the ‘top-down’ approach, devices are created by a combination of lithography and etching. The resolution limits are determined by, for example, the wavelength of light used in the lithography process: lithography is a highly developed and reliable technology with high throughput but the current state of the art (using UV radiation) can achieve devices with dimensions ˜10 nm only at great expense. Other lithography techniques (e.g. electron beam lithography) provide (in principle) higher resolution but with a much slower throughput.
The ‘bottom-up’ approach proposes the assembly of devices from nanoscale building blocks, thus immediately achieving nanoscale resolution, but the approach usually suffers from a range of other problems, including the difficulty, expense, and long time periods that can be required to assemble the building blocks. A key question is whether or not the top-down and bottom-up approaches can be combined to fabricate devices which take the best features of both approaches while circumventing the problems inherent to each approach.
An example of a prior art development which attempts to use this combination of approaches is the highly successful fabrication of transistors from carbon nanotubes [1]. Contacts are fabricated using lithography, and a nanoscale building block (in the form of a nanometre thick carbon nanotube) is used to provide the conducting path between the contacts. These transistors have been shown [2,3] to exhibit quantum transport effects and to have transistor characteristics comparable to those of Si— MOSFETs used in integrated circuits, and are therefore in principle usable in commercial applications. However, the difficulty in isolating and manipulating single nanotubes to form reproducible devices may prevent widespread commercial usage. Hence the development of new techniques for the formation of nanoscale wire structures between electrically conducting contacts is an important technological problem.
One simple approach to the formation of nanoscale wires is to stretch a larger wire until it is close to the breaking point with a diameter of just a few atoms (See e.g. Ref [4] and refs therein; similar effects can be achieved using scanning tunnelling microscopes). At this point the break junction can exhibit quantised conductance. This technique, while interesting, is not well suited to device formation since generally the technique is difficult to control, only a single wire can be fabricated at any time, and since multi-terminal devices cannot be easily achieved.
Another approach is to use a combination of lithographic and electrochemical techniques to achieve narrow wires and/or contacts with nanometre scale spacing [5]. Electrochemical deposition of Cu allows the observation of quantised conduction and a chemical sensor has been developed from these nanowires [6]. While these devices are promising it remains to be demonstrated that they can be fabricated sufficiently controllably or reproducibly for commercial applications, or that multi-terminal or other electronic devices can be fabricated using this method.
The proposal [7] that structures on the scale of a few nanometres could be formed using atomic clusters, which are nanoscale particles formed by simple evaporation techniques (see for example [8,9]), has already caught the imagination of a few groups internationally [10]. It has been shown that clusters can diffuse across a substrate [11] and then line up at certain surface features, thus generating cluster chain structures [12,13,14], although in these cases the chains are usually incomplete (have gaps) and such chains have so far not been connected to electrical contacts on non-conducting substrates. This approach is promising because the width of the wire is controlled by the size of the clusters, but the problem of positioning the clusters to form real devices on useful substrates has yet to be solved.
Devices formed using atomic clusters have been reported in Refs [8,15,16]: a network of clusters is formed by an ion beam deposition method [15] between two contacts which are defined using electron beam lithography. In this work clusters were formed by deposition of atomic vapour and not by deposition of preformed nanoparticles onto the substrate. The devices exhibit the Coulomb Blockade effect at T=77K [8] but apparently quantum effects are not visible at room temperature. In this work only clusters of AuPd and Au have been employed and, importantly, in these devices conduction through the cluster network was by tunnelling. No method was described which lead to the controllable formation of a conducting path, and only two terminal devices were described, and hence a device similar to the nanotube transistors described above was not formed.
A number of devices (see for example [17,18,19]) have been fabricated which incorporate single (or a very limited number) of nanoscale particles. These devices are potentially very powerful but, equally, are most likely to be subject to difficulties associated with the expense and long time periods that can be required to assemble the building blocks. Device to device reproducibility, and difficulty of positioning of the nanoparticles may be additional problems. Furthermore the preferred embodiment of these devices requires that the nanoparticle be isolated from the contacts by tunnel barriers whose properties are critical to the device performance, since tunnelling currents depend exponentially on the barrier thickness. In some cases the use of a scanning tunnelling microscope leads to a slow and not scalable fabrication process. Recent progress in this area has resulted in the first single electron transistors fabricated with a single atom as the island onto which tunnelling occurs [19]. While this is a significant achievement, and an element of self assembly in the fabrication is attractive, such devices are still far from commercial production and the methods used may not be viable for large scale production.
Wet chemical methods (see for example [17]) have also been shown to be useful with respect to fabrication of nanoscale devices and offer some promise as a method of overcoming the difficulties in positioning nanoparticles. While these techniques may still be important in the future, the limitations include the limited range of types of nanoparticles that can be formed using these techniques, the difficulty in coding specific sites to attract nanoparticles, and there are so far unanswered questions regarding their suitability for scaling.
Finally we mention that several experiments (see for example [20,21,22,23,24,25]) have been performed on percolation in films of metal nanoparticles. Typically nanoparticles are deposited between electrical contacts and a clear onset of conduction can be observed at the percolation threshold. The experimental literature contains no reports of percolation in films of nanoparticles where the films have nanoscale overall dimensions (i.e. where the contact separation is small) and to our knowledge there are no proposals in the literature for the use of percolating films in nanoscale devices. The use of macroscopic contact separations ensures that even at the percolation threshold the properties of the film are strongly affected by the relatively homogeneous nature of the macroscopic cluster assembled film, even though somewhere in the structure a narrow channel may exist in which a single particle or several neighbouring particles create a narrow wire-like structure. There has been no previous proposal to use nanoscale cluster chains formed at the percolation threshold in nanoscale electronic devices.